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  1. general description the 74alvch16501 is an 18-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. data flow in each direction is controlled by outp ut enable (oeab and oeba ), latch enable (lea b and leba), and clock (cpab and cpba) inputs. for a-to-b data flow, the device operates in the transparent mode when leab is high. when leab is low, th e a data is latched if cpab is held at a high or low logic level. if l eab is low, the a-bus data is st ored in the latc h/flip-flop on the low-to high transition of cpab. when oeab is high, the outputs are active. when oeab is low, the outputs are in the high-impedance state. data flow for b-to-a is similar to that of a-to-b but uses oeba , leba and cpba. the output enables are complimenta ry (oeab is active high, and oeba is active low. to ensure the high-impedance state during power-up or power-down, oeba should be tied to v cc through a pull-up resistor and oeab should be tied to gnd through a pull-down resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcin g capability of the driver. active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. 2. features and benefits ? wide supply voltage range from 1.2 v to 3.6 v ? complies with jedec standard jesd8-b ? cmos low power consumption ? direct interface with ttl levels ? current drive 24 ma at v cc = 3.0 v ? universal bus transceiver with d-type latc hes and d-type flip-flops capable of operating in transparent, latched or clocked mode ? all inputs have bus hold circuitry ? output drive capability 50 transmission lines at 85 c ? 3-state non-inverting outputs for bus-oriented applications 74alvch16501 18-bit universal bus transceiver; 3-state rev. 03 ? 2 april 2010 product data sheet
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 2 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74ALVCH16501DGG ? 40 c to +85 c tssop56 plastic thin shrink small outline package; 56 leads; body width 6.1 mm sot364-1 74alvch16501dl ? 40 c to +85 c ssop56 plastic shrink small outline package; 56 leads; body width 7.5 mm sot371-1 fig 1. logic symbol fig 2. iec logic symbol 001aal71 8 a0 3 54 b0 a1 5 52 b1 a2 6 51 b2 a3 8 49 b3 a4 9 48 b4 a5 10 47 b5 a6 12 45 b6 a7 13 44 b7 a8 14 43 b8 a9 15 42 b9 a10 16 41 b10 a11 17 40 b11 a12 19 38 b12 a13 20 37 b13 a14 21 36 b14 a15 23 34 b15 a16 24 33 b16 a17 26 31 b17 oeab 127 oeba leab 228 leba cpab 55 30 cpba 001aal71 7 1 oeab 27 oeba 55 cpab 2 leab 30 cpba 28 leba 3 a0 3d 1 1 416d 54 b0 5 a1 52 b1 6 a2 51 b2 8 a3 49 b3 9 a4 48 b4 10 a5 47 b5 12 a6 45 b6 13 a7 44 b7 14 a8 43 b8 15 a9 42 b9 16 a10 41 b10 17 a11 40 b11 19 a12 38 b12 20 a13 37 b13 21 a14 36 b14 23 a15 34 b15 24 a16 33 b16 26 a17 31 b17 en1 en4 2c3 c3 5c6 c6 g2 g5
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 3 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state fig 3. bus hold circuit 001aal73 3 v cc to internal circuit data input fig 4. logic diagram 001aal71 9 oeab cpba leba cpab leab oeba a1 b1 18 identical channels c1 1d c1 1d c1 1d c1 1d
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 4 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 5. pinning information 5.1 pinning 5.2 pin description fig 5. pin configuration 74alvch16501 oeab gnd leab cpab a0 b0 gnd gnd a1 b1 a2 b2 v cc v cc a3 b3 a4 b4 a5 b5 gnd gnd a6 b6 a7 b7 a8 b8 a9 b9 a10 b10 a11 b11 gnd gnd a12 b12 a13 b13 a14 b14 v cc v cc a15 b15 a16 b16 gnd gnd a17 b17 oeba cpba leba gnd 001aal716 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 table 2. pin description symbol pin description oeab 1 output enable a-to-b input leab 2 latch enable a-to-b input a0 to a17 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 data inputs or outputs gnd 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 ground (0 v) v cc 7, 22, 35, 50 positive supply voltage oeba 27 output enable b-to-a leba 28 latch enable b-to-a
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 5 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 6. functional description 6.1 function table [1] a-to-b data flow is shown; b- to-a flow is similar but uses oeba , leba and cpba. h = high voltage level; h = high voltage level one set-up time prior to the enable or clock transition; l = low voltage level; l = low voltage level one set-up time prio r to the enable or clock transition; x = don?t care; z = high-impedance off-state; = high-to-low clock transition; = low-to-high clock transition. 7. limiting values cpba 30 clock input b-to-a b0 to b17 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 data inputs or outputs cpab 55 clock input a-to-b table 2. pin description ?continued symbol pin description table 3. function table [1] inputs output operating mode oeab leab cpab an bn l x x x z disabled h h x h h transparent h h x l l h x h h latch data and display h x l l h l h h clock data and display h l l l h l h or l x h hold data and display h l h or l x l table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v i ik input clamping current v i < 0 v ? 50 - ma v i input voltage control inputs [1] ? 0.5 +4.6 v data inputs [1] ? 0.5 v cc + 0.5 v i ok output clamping current v o > v cc or v o < 0 v - 50 ma v o output voltage [1] ? 0.5 v cc + 0.5 v i o output current v o = 0 v to v cc - 50 ma i cc supply current - 100 ma
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 6 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] above 55 c the value of p tot derates linearly with 11.3 mw/k. [3] above 55 c the value of p tot derates linearly with 8 mw/k. 8. recommended operating conditions i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 c p tot total power dissipation t amb = ? 40 c to +125 c ssop package [2] - 850 mw tssop package [3] - 600 mw table 4. limiting values ?continued in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit table 5. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage maximum speed performance c l = 30 pf 2.3 - 2.7 v c l = 50 pf 3.0 - 3.6 v low-voltage applications 1.2 - 3.6 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t amb ambient temperature in free air ? 40 - +85 c t/ v input transition rise and fall rate v cc = 2.3 v to 3.0 v 0 - 20 ns/v v cc = 3.0 v to 3.6 v 0 - 10 ns/v
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 7 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 9. static characteristics [1] all typical values are measured at t amb = 25 c. [2] valid for data inputs of bus hold parts only. table 6. static characteristics at recommended operating conditions. volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ [1] max unit t amb = ? 40 c to +85 c v ih high-level input voltage v cc = 2.3 v to 2.7 v 1.7 1.2 - v v cc = 2.7 v to 3.6 v 2.0 1.5 - v v il low-level input voltage v cc = 2.3 v to 2.7 v - 1.2 0.7 v v cc = 2.7 v to 3.6 v - 1.5 0.8 v v oh high-level output voltage v i = v ih or v il i o = ? 100 a; v cc = 2.3 v to 3.6 v v cc ? 0.2 v cc - v i o = ? 6 ma; v cc = 2.3 v v cc ? 0.3 v cc ? 0.08 - v i o = ? 12 ma; v cc = 2.3 v v cc ? 0.6 v cc ? 0.26 - v i o = ? 12 ma; v cc = 2.7 v v cc ? 0.5 v cc ? 0.14 - v i o = ? 12 ma; v cc = 3.0 v v cc ? 0.6 v cc ? 0.09 - v i o = ? 24 ma; v cc = 3.0 v v cc ? 1.0 v cc ? 0.28 - v v ol low-level output voltage v i = v ih or v il i o = 100 a; v cc = 2.3 v to 3.6 v - gnd 0.20 v i o = 6 ma; v cc = 2.3 v - 0.07 0.40 v i o = 12 ma; v cc = 2.3 v - 0.15 0.70 v i o = 12 ma; v cc = 2.7 v - 0.14 0.40 v i o = 24 ma; v cc = 3.0 v - 0.27 0.55 v i i input leakage current v i = v cc or gnd; v cc = 2.3 v to 3.6 v - 0.1 5 a i oz off-state output current v i = v ih or v il ; v o = v cc or gnd; v cc = 2.7 v to 3.6 v - 0.1 10 a i cc supply current v cc = 2.3 v to 3.6 v; v i = v cc or gnd; i o = 0 a - 0.2 40 a i cc additional supply current per data i/o pin; v cc = 2.3 v to 3.6 v; v i = v cc ? 0.6 v; i o = 0 a - 150 750 a i bhl bus hold low current v cc = 2.3 v; v i = 0.7 v [2] 45 - - a v cc = 3.0 v; v i = 0.8 v [2] 75 150 - a i bhh bus hold high current v cc = 2.3 v; v i = 1.7 v [2] ? 45 - - a v cc = 3.0 v; v i = 2.0 v [2] ? 75 ? 175 - a i bhlo bus hold low overdrive current v cc = 3.6 v [2] 500 - - a i bhho bus hold high overdrive current v cc = 3.6 v [2] ? 500 - - a c i input capacitance - 4.0 - pf c i/o input/output capacitance - 8.0 - pf
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 8 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 10. dynamic characteristics table 7. dynamic characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v); test circuit figure 10 . symbol parameter conditions min typ [1] max unit t amb = ? 40 c to +85 c f max maximum frequency see figure 8 v cc = 2.3 v to 2.7 v [2] 150 333 - mhz v cc = 3.0 v to 3.6 v [3] 150 340 - mhz v cc = 2.7 v 150 333 - mhz t pd propagation delay an to bn; bn to an; see figure 6 [4] v cc = 2.3 v to 2.7 v [2] 1.0 2.8 5.1 ns v cc = 3.0 v to 3.6 v [3] 1.0 3.0 4.2 ns v cc = 2.7 v - 3.0 4.6 ns leab, leba to bn, an; see figure 8 v cc = 2.3 v to 2.7 v [2] 1.1 3.5 6.1 ns v cc = 3.0 v to 3.6 v [3] 1.3 3.4 4.8 ns v cc = 2.7 v - 3.6 5.3 ns cpab, cpba to bn, an; see figure 8 v cc = 2.3 v to 2.7 v [2] 1.0 3.3 6.1 ns v cc = 3.0 v to 3.6 v [3] 1.4 3.3 4.9 ns v cc = 2.7 v - 3.4 5.6 ns t en enable time oeba to an; see figure 7 [4] v cc = 2.3 v to 2.7 v [2] 1.3 2.8 6.3 ns v cc = 3.0 v to 3.6 v [3] 1.1 2.5 5.0 ns v cc = 2.7 v - 3.3 6.0 ns oeab to bn; see figure 7 v cc = 2.3 v to 2.7 v [2] 1.0 2.5 5.8 ns v cc = 3.0 v to 3.6 v [3] 1.0 2.4 4.6 ns v cc = 2.7 v - 2.7 5.3 ns t dis disable time oeba to an; see figure 7 [4] v cc = 2.3 v to 2.7 v [2] 1.3 2.5 5.3 ns v cc = 3.0 v to 3.6 v [3] 1.3 3.1 4.2 ns v cc = 2.7 v - 3.3 4.6 ns oeab to bn; see figure 7 v cc = 2.3 v to 2.7 v [2] 1.5 2.5 6.2 ns v cc = 3.0 v to 3.6 v [3] 1.4 2.9 5.0 ns v cc = 2.7 v - 3.6 5.7 ns
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 9 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state [1] all typical values are measured at t amb = 25 c . [2] typical values are measured at v cc = 2.5 v. [3] typical values are measured at v cc = 3.3 v. [4] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . [5] c pd is used to determine the dynamic power dissipation (p d in w). p d = c pd v cc 2 f i n + (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; n = total load switching outputs; (c l v cc 2 f o ) = sum of outputs. t w pulse width leab, leba high; see figure 8 v cc = 2.3 v to 2.7 v [2] 3.3 0.8 - ns v cc = 3.0 v to 3.6 v [3] 3.3 0.9 - ns v cc = 2.7 v 3.3 0.7 - ns cpab, cpba high or low; see figure 8 v cc = 2.3 v to 2.7 v [2] 3.3 2.0 - ns v cc = 3.0 v to 3.6 v [3] 3.3 1.1 - ns v cc = 2.7 v 3.3 1.4 - ns t su set-up time an, bn to cpab, cpba; see figure 9 v cc = 2.3 v to 2.7 v [2] 1.7 0.1 - ns v cc = 3.0 v to 3.6 v [3] 1.3 ? 0.3 - ns v cc = 2.7 v 1.4 ? 0.1 - ns an, bn to leab, leba; see figure 9 v cc = 2.3 v to 2.7 v [2] 1.1 0.1 - ns v cc = 3.0 v to 3.6 v [3] 1.0 0.3 - ns v cc = 2.7 v 1.0 ? 0.2 - ns t h hold time an, bn to cpab, cpba; see figure 9 v cc = 2.3 v to 2.7 v [2] 1.7 0.3 - ns v cc = 3.0 v to 3.6 v [3] 1.3 0.4 - ns v cc = 2.7 v 1.6 0.3 - ns an, bn to leab, leba; see figure 9 v cc = 2.3 v to 2.7 v [2] 1.6 0.3 - ns v cc = 3.0 v to 3.6 v [3] 1.2 0.1 - ns v cc = 2.7 v 1.5 0.1 - ns c pd power dissipation capacitance per buffer; v i = gnd to v cc [5] outputs enabled - 21 - pf outputs disabled - 3 - pf table 7. dynamic characteristics ?continued at recommended operating conditions. voltages are referenced to gnd (ground = 0 v); test circuit figure 10 . symbol parameter conditions min typ [1] max unit
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 10 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 11. waveforms measurement points are given in table 8 . v ol and v oh are typical output levels that occur with the output load. fig 6. propagation delay, data input (an, bn) to data output (bn, an) 001aal73 4 an, bn input bn, an output t phl t plh gnd v i v m v m v m v m v oh v ol measurement points are given in table 8 . v ol and v oh are typical output levels that occur with the output load. fig 7. 3-state output enable and disable times 001aal72 1 t plz t phz outputs disabled outputs enabled v y v x outputs enabled an, bn output low-to-off off-to-low an, bn output high-to-off off-to-high oeab, oeba input gnd v i v ol v oh v cc v m v m gnd t pzl t pzh v m v m
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 11 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state measurement points are given in table 8 . v ol and v oh are typical output levels that occur with the output load. fig 8. propagation delay, latch enable input (leab, leba) and clock pulse input (cpab, cpba) to data output, and pulse width 001aal72 0 t phl t plh t w 1 / f max v m v m v m v m v m lexx input cpxx input an, bn output gnd v oh v ol v i measurement points are given in table 8 . fig 9. data set-up and hold times (an, bn inputs to leab, leba, cpab and cpba inputs) 001aal72 2 v m v i gnd v i gnd an, bn input cpxx, lexx input v m v m t su t h t su t h v m v m v m table 8. measurement points supply voltage input output v cc v i v m v m v x v y 2.3 v to 2.7 v v cc 0.5 0.5 v ol + 0.15 v v oh ? 0.15 v 2.7 v 2.7 v 2.7 v 1.5 v v ol + 0.3 v v oh ? 0.3 v 3.0 v to 3.6 v 2.7 v 2.7 v 1.5 v v ol + 0.3 v v oh ? 0.3 v
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 12 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 12. test information test data is given in table 9 . definitions for test circuit: r l = load resistance. c l = load capacitance includes jig and probe capacitance. r t = termination resistance should be equal to z o of pulse generator. v ext = external voltage for measuring switching times. fig 10. load circuit for measuring switching times v ext v cc v i v o mna61 6 dut c l r t r l r l g table 9. test data supply voltage input load v ext v cc v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 open 2 v cc gnd 2.7 v 2.7 v 2.5 ns 50 pf 500 open 2 v cc gnd 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 open 2 v cc gnd
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 13 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 13. package outline fig 11. package outline sot364-1 (tssop56) unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot364-1 99-12-27 03-02-19 w m a a 1 a 2 d l p q detail x e z e c l x (a ) 3 0.25 128 56 29 y pin 1 index b h 1.05 0.85 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 1 8.3 7.9 0.50 0.35 0.5 0.1 0.08 0.25 0.8 0.4 p e v m a a t ssop56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm sot364 -1 a max. 1.2 0 2.5 5 mm scale mo-153
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 14 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state fig 12. package outline sot371-1 (ssop56) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 18.55 18.30 7.6 7.4 0.635 10.4 10.1 1.0 0.6 1.2 1.0 0.85 0.40 8 0 o o 0.18 0.25 1.4 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot371-1 99-12-27 03-02-18 (1) w m b p d h e e z e c v m a x a y 56 29 mo-118 28 1 a a 1 a 2 l p q detail x l (a ) 3 pin 1 index 0 5 10 mm scale s sop56: plastic shrink small outline package; 56 leads; body width 7.5 mm sot371 -1 a max. 2.8
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 15 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 14. abbreviations 15. revision history table 10. abbreviations acronym description cmos complementary metal-oxide semiconductor dut device under test ttl transistor-transistor logic table 11. revision history document id release date data sheet status change notice order number supersedes 74alvch16501_3 20100402 product data sheet - - 74alvch16501_2 modifications: ? the format of this data sheet has been r edesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to t he new company name where appropriate. ? section 3 ? ordering information ? : added type 74alvch16501dl. ? quick reference section removed. 74alvch16501_2 19980929 product specification - - 74alvch16501_1 74alvch16501_1 19980929 product specification - - -
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 16 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer?s third party customer(s) (hereinafter both referred to as ?application?). it is customer?s sole responsibility to check whether the nxp semiconductors product is suitable and fit for the application planned. customer has to do all necessary testing for the application in order to avoid a default of the application and the product. nxp semiconducto rs does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objec tive specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74alvch16501_3 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 03 ? 2 april 2010 17 of 18 nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74alvch16501 18-bit universal bus transceiver; 3-state ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 2 april 2010 document identifier: 74alvch16501_3 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 5 6.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 recommended operating conditions. . . . . . . . 6 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 test information . . . . . . . . . . . . . . . . . . . . . . . . 12 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 16 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 17 contact information. . . . . . . . . . . . . . . . . . . . . 17 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18


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